cystech electronics corp. spec. no. : c531a3 issued date : 2003.04.08 revised date : 2010.11.16 page no. : 1/4 LM79L12A3 cystek product specification three terminal low current negative voltage regulators LM79L12A3 description the LM79L12A3 is an inexpensive, easy-to-use device suitable for numerous applications requiring up to 100ma. like the higher powered lm7900e3 series negative regulators, this device features thermal shutdown and current limiting, to-92 making it remarkably rugged. in most applications, no external components are required for operation. the LM79L12A3 device is useful for on-card regulation or any other application where a regulated negative voltage at a modest current level is needed. this regulator offers substantial advantage over the common resistor/zener diode approach. ? no external components required ? internal short circuit current limiting ? internal thermal overload protection ? low cost ? complementary positive regulators offered(lm78l12a3) ? available in either 3% or 5% selection. absolute maximum ratings (ta=25 c) ? input voltage????????????????????????????????????. -35v ? total power dissipation?????????????????? ????????. internally limited ? operating temperature range???????????????????????. 0 c to +125 c ? maximum junction temperature??????????????????????????. .+150 c ? storage temperature range???????????????????????? -65 c to +150 c ? lead temperature (soldering 10s)????????????.. ???????????... 260 c gnd r17 r16 outp u q12 r15 q13 r14 q11 q2 q7 q6 c r10 r11 q9 q14 q8 r9 r4 r7 q4 q5 r8 r6 q10 r1 r18 r5 r2 q1 d1 z1 input r3 representative schematic diagram typical application lm79l12 vout vin c1 c2 note: c1 and c2 are required if regulator is located far from power supply filter and load, or oscillation may induced on the loop.
cystech electronics corp. spec. no. : c531a3 issued date : 2003.04.08 revised date : 2010.11.16 page no. : 2/4 LM79L12A3 cystek product specification ordering information device output voltage tolerance LM79L12A3 a-rank 3% LM79L12A3 b-rank 5% electrical characteristics vin=-19v, iout=40ma, 0 c tj 125 c, cin=0.33 f, cout=0.1 f (unless otherwise noted) LM79L12A3 a-rank symbol parameter conditions min typ max units tj=25 c -11.64 -12.00 -12.36 1ma io 70ma -11.6 - -12.4 vo output voltage 1ma io 40ma and -11.6 - -12.4 v -14.5v vin -27v tj=25 c, -14.5v vin -27v - - 250 vo line regulation - - 200 mv tj=25 c, -16v vin -27v tj=25 c, 1ma io 100ma - - 100 vo load regulation tj=25 c, 1ma io 40ma - - 50 mv tj=25 c - - 6.5 iq quiescent current tj=125 c - 6.0 ma - 1ma io 40ma - - 0.2 iq quiescent current change -16v vin -27v - - 1.5 ma vn output noise voltage - ta=25 c, 10hz f 100khz 80 - v vin / vout ripple rejection -15v vin -25v, f=120hz 37 42 - db vd dropout voltage tj=25 c,iout=40ma - 1.7 - v lm79l05a3 b-rank symbol parameter conditions min typ max units tj=25 c -11.52 -12.00 -12.48 1ma io 70ma -11.4 - -12.6 vo output voltage 1ma io 40ma and -11.4 - -12.6 v -14.5v vin -27v tj=25 c, -14.5v vin -27v - - 250 vo line regulation - - 200 mv tj=25 c, -16v vin -27v tj=25 c, 1ma io 100ma - - 100 vo load regulation tj=25 c, 1ma io 40ma - - 50 mv tj=25 c - - 6.5 iq quiescent current tj=125 c - 6.0 ma - 1ma io 40ma - - 0.2 iq quiescent current change -16v vin -27v - - 1.5 ma vn output noise voltage - 80 - ta=25 c, 10hz f 100khz v vin / vout ripple rejection -15v vin -25v, f=120hz 37 42 - db vd dropout voltage - 1.7 - v tj=25 c,iout=40ma
cystech electronics corp. spec. no. : c531a3 issued date : 2003.04.08 revised date : 2010.11.16 page no. : 3/4 LM79L12A3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 217 c 60-150 seconds 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c531a3 issued date : 2003.04.08 revised date : 2010.11.16 page no. : 4/4 LM79L12A3 cystek product specification to-92 dimension *: typical inches millimeters inches millimeters 79l12 3 1 a d b c i 1 e f 2 3 g h 2 s t yle: pin 1.g nd 2.v i n 3.v out 3-l ead t o -9 2 plastic pa ckag e cys t ek pa ck a g e code: a 3 date cod e rank dim m i n . m a x . m i n . m a x . dim m i n . m a x . m i n . m a x . a 0 . 1 7 0 4 0 . 1 9 0 2 4 . 3 3 4 . 8 3 g 0.0142 0 . 0 2 2 0 0 . 3 6 0 . 5 6 b 0 . 1 7 0 4 0 . 1 9 0 2 4 . 3 3 4 . 8 3 h - * 0 . 1 0 0 0 - * 2.54 c 0 . 5 0 0 0 - 1 2 . 7 0 - i - * 0 . 0 5 0 0 - * 1.27 d 0 . 0 1 4 2 0 . 0 2 2 0 0 . 3 6 0 . 5 6 1 - * 5 - * 5 e - * 0 . 0 5 0 0 2 - * 2 - * 2 - * 1.27 f 0 . 1 3 2 3 0 . 1 4 8 0 3 . 3 6 3 . 7 6 - - 3 * 2 * 2 note s: 1.controlling dimension: millimeter s. 2.maximum lead thickness include s lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is an y q uestion w i th p a ck ing specification or p a cking metho d , please c ont act y our local c y s t ek sales of fice. material: ? lead: pur e tin plated. ? mold compou n d : epoxy resin fa mily , flammabilit y solid burning cla ss: ul94v -0. im portan t n o tice : ? all rights are re served. reprod u c tion in w hole or in part is prohibited w i thout the p r ior w r itten a pprov al of c y stek. ? c y stek reserv es the right to m a ke changes to its products w i tho u t notice. ? cy st e k semic ond uct o r pr odu cts are n o t warr ante d t o be s u it able f o r use i n l i fe-su p p o rt a p p licatio ns, or sys tems. ? c y stek assumes no liability fo r an y consequenc e of customer pr oduct design, infringement of pat e n ts, or application assistance .
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